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Senior RFIC Designer - Quorum Systems

Posted - 11/07/2009
Company Quorum Systems Inc      
Job Type Full-Time Employee
Salary N/A
Location San Diego, CA, USA
Region: North America
Education Bachelor's Degree
Work Experience 2-5 years
Job Reference
Details Experienced RFIC design engineer contributing as a member of the IC design/development team. The design focus is wireless radio transceiver front ends for cellular and wireless networking systems. Experience in CMOS analog IC design is required. Knowledge of CMOS IC debug & characterization, device modeling, and design challenges in scaled CMOS technologies (flicker noise, short channel effects, etc.) as well as a strong academic and industry background is strongly preferred.


* Design of high performance and highly profitable products for wireless cellular and networking applications
* Design of RFIC in commercial/standard CMOS technologies for mass production
* Design and implementation of topologies including but not limited to:
- Low Noise Amplifiers & quadrature down-converters
- LO chains with signal buffers, frequency dividers, and quadrature generators
- Transmit modulators and Power amplifiers/drivers
- Polar loop and/or Translational loop transmitters
- RF VCO's and synthesizers
* Conducting circuit simulations for design validation over voltage, process, and temperature
* Design and validation of integrated calibration and test algorithms
* RFIC layout and/or oversight of layout
* Integration, test, and debug of IC subsystems at top-level
* Bench debug, test, and characterization of RF integrated circuits


* Minimum of 4 years of experience in RFIC design
* Must be able to demonstrate the ability to design commercially viable products
* Must be proficient with simulation tools (Cadence, Spectre, SpectreRF, etc.)
* Design experience in cellular systems (GSM/EDGE, CDMA, WCDMA) is desirable
* Design experience in wireless networking (802.11, 802.16, DVB) is desirable
* Must possess a basic understanding of transceiver system design issues
* Must demonstrate the ability to make power, die area and performance trade-offs
* Familiarity with precise analog layout theory, with layout experience is desired


* BSEE with equivalent wireless work experience, MSEE or PhD preferred (with emphasis on RF related fields
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